Minutes of the forward endcap EMC eZuce SRN meeting, 30th of January 2017, 14:00-15:25

Presence:

• Basel: Werner
• Bochum: Cathrina, Claudius, Fritz-Herbert, Matthias, Malte, Miriam, Tom, Tobias H., Tobias T.
• Bonn: Christoph, Merlin, ...
• Groningen: -
• Stochholm: Markus, Dirk
• Uppsala: Pawel, Karoly
• Giessen: Hans, ...
• GSI: -

Annealing LED issues:

• Introduction of annealing LEDs to read out end of crystals close to VPTTs does not generate excessive noise to readout (as reported earlier)
• Introducing the same LEDs to APD read out crystals does strongly affect the preamp output: CAN bus traffic clearly overlays preamp output signals
• Suggestion for remedy by Hans: HF blocking with ceramic capacitors from both LED leads to ground and/or in between LED leads
  • -- MalteAlbrecht - 15 Feb 2017 :
  • In The meantime we have finished the measurements w/ the improvement as suggested by Hans. Please see the corresponding plots below, the conclusion is: With the use of a coaxial cable (NEXANS Filotex) and a 100nF HF-blocking capacitor directly mounted between the two leads of the LED, the influence of the annealing LED is significantly smaller than w/o the capacitor and the coax cable. For the APD which is further away from the LED in the unit, there is no significant influence visible any more, while for the APD in the direct vicinity the sigma of the noise distribution gets about 7 channels larger. We will have to decide, if this is acceptable to be used in the FW endcap, or if we have to improve this further.
  • The plots show the noise distributions for all scenarios presented for the VPTT units before, now for the two APDs of one "unit" ( e.g. one crystal). APD5856 was the one nearer to the LED.
  • 

ADC boards:

• Order will be placed soon, need then to test individual boards prior to payment
• Test board to be able to do so made by Pawel, Diploma student expected to do the testing work
• 2 ADC boards for Giessen ready in two weeks (need to be tested first)
• The two ADC related publications need to be finalized
• Malte is working on shaping time determination issues in conjunction with Myroslav (pile-up recovery)

HV trimming:

• Status of 'serial adapter chips"? Nothing heard so far from Holger/GSI, Hans/PI Bonn