Ringing/oscillation problems seem to be solved with latest version (in contast to what was reported on the Collaboration meeting - a faulty test setup caused early bad results...)
No ringing even under crtitical conditions: hot/cold operation, parallel LV supply, external excitation (HF vacuum tester)
We will replace the two APD-equipped test crystals in the Bonn cosmics test setup (which are currently unable to be read out due to oscillation) with units equipped with this modified preamps
Remedy to the ringing problem is a capacitor across the opamp inputs limiting open loop HF gain and therefore increase phase margin in closed feedback loop
VPTTs:
Markus Kuhlmann is going to finish the VPTT B-field measurements in Bonn
His first job is an integration of all Bonn B- field data into our detector production database
Subunits:
As reported on the Collaboration Meeting we are still puzzling over the fact that some APD-equipped crystals show heavily different responses of the two read-out channels
Simulations and measurements are going on
We can exclude the APDs from being the source of this problem (removed 2-APD read out units do not show different responses to light pulser signals)
Candidates are: The glueing, the crystal itself (geometry, run of optical symmetry axes?), the mirror foil (even though it seems to mitigate the problem rather than causing it)
Glueing turns out to be a seperate problem: We lost many APD-crystal couplings (half of one subunit) and also two VPTT couplings
It is always the glue-crystal connection that fails, leaving a clean crystal surface
Systematic breakaway tests of different glueing methods are in preparation
Read out electronics:
Pawel gave a report of the neutron irradiation tests at TSL Uppsala:
Two test configurations:
FPGA test under load
Regular read out of ADCs at 3.6 x 10^6 n/cm^2s, corresponding to about 0.4 times the full PANDA luminosity lifetime dose of the ADCs in the forward endcap:
All waveforms okay (noise)
All baselines okay (no signals used)
Repairable problems occur about every 9 h per unit, irrepairable ones (needing reprogramming) every 22 d per unit
700 units: 'repair' necessary every 46 s (taking 300 ms of reinitialization of the FPGA)
Effectively no data loss because of 2-APD readout
For the finalization of the ADC boards Pawel would like to extend the boards somewhat in length and width (5 mm each) in order to to reduce current density
Claudius will check if that is possible: In the meantime we know it is not! (An extension of the board length will clash with the cooling structures)
There has been again quite some discussion about the lab ADC readout approaches:
Matthias would like to have a 'turnkey system' being able to e.g. sample in front of pulses, allow for triggered readout...
It would be "quite a project to dig out the WASA stuff again" for readout, however WASA data concentrators might be available
Christoph suggested to rewrite Bonn VHDL code:
One channel triggering and pushing all waveforms to the output (UDP packets)
Time scale in the order of a week - however, no promises, need to talk to Johannes
We decided to follow this approach (there has been some exchange between Johannes an Matthias in the meantime)
Cabling:
Christoph asked for the confectioning of the HV cables (Draka 5 kV, rad. hard), after some discussion we decided to let both sides be crimped by company and keep some spare length instead of a perfect fit trimming later in the detector hall
We need to fix the endcap inside LV cabling: the routing is still unclear, single supply of every subunit possible? Bochum will look for suitable LV cables.
I2C cabling: 4...8 lines from outside needed to enter the full endcap. Bonn will look for suitable I2C cables. Hans suggested to test the suitability of the multi-twisted pair Bedea cables used for barrel signal readout.