You are here: Panda Wiki>EMC Web>ForwardEndcapMeetings>Minutes2015-04-13 (2015-04-14, Attach

Minutes of the forward endcap EMC meeting, 13th of April 2015, SeeVogh, 15:15-16:05

Topics are not in the order of discussion, but by subject.

  • Basel: Werner
  • Bochum: Cathrina, Claudius, Fritz-Herbert, Malte, Mario, Matthias, Miriam, Ronja, Tobias H., Tobias T.
  • Bonn: Christoph, Ulrike
  • Groningen: (Myroslav, information by mail after meeting)
  • Uppsala: (Pawel, information by mail after meeting)
  • GSI: -

Mechanics workshop 27/28.4. at GSI
  • Tentative schedule of talks (Fritz-Herbert will contact Lars):
    • Christoph: Status of cable orders, open points for final orders, delivery times etc.
    • Claudius: Cable routing outside of forward endcap, plans for holes in magnet, space for cooling (mixer box), crate positions
    • Fritz-Herbert: Mounting of forward endcap (rails etc.)

  • Plans for spare alveoli: 214 full plus 20 spare, 54 half plus 6 spare.

FEE/DAQ workshop
  • Tobias T. reports briefly:
    • Sodanet not yet functional, intermediate step Soda-net with point to point connections (see also Myroslav additions below)
    • Manpower problem for prototype DAQ, only Milan Wagner remaining.
    • Status of new SADC: See report by Pawel below.
    • Hardware for DAQ on hold, waiting for next FPGA generation. Delays software developments and tests. (See also Myroslav corrections below).
  • Pawel reported by mail a summary of his presentation:
    1. The new SADC was assembled (1 piece) and tested. The device works and in the current filter setup features a very low noise. The device is now in possesion of KVI, who will define the input filter/amplifier for the rest of the units (5 pieces) which are pending.
    2. A design of a Data Concentrator board based on Kintex Ultrascale has been started. There is a common consensus about using these FPGAs, since the newer Ultrascale+ (16 nm) will be pin compatible, according to Xilinx sources.
    3. A small scale Data Concentrator board based on a ZYNQ FPGA is in the final design state. It will allow a simple readout of up to 4 devices sending data over optical links.
    4. A Shashlyk version of the SADC was discussed. The requests of having them in uTCA crates while at the same time keep the uTCA crates exposed to radiation do not match. uTCA crates and modules contain microcontrollers, which will not survive in these conditions. Either the Shashlyk SADC will share the same construction as the EMC SADC (only being faster - 125 MSPS), or the uTCA crates are moved away from the hall. Uppsala is tentatively committing itself to financing the Shashlyk SADC project.
    5. Uppsala group has been granted more money for the EMC Readout.
  • Myroslav mailed following corrections/additions to the report from Tobias
      • indeed the SODANET does not function yet as we intended. It is being debugged. Therefore we made a work-around version SODA-NET. It has same functionality but need extra link to data concentrator for the slow control. The SODA-NET is completely functional and tested on a small system (see my presentation). We are busy to set up a larger-scale system. The SODA-NET can be used for pre-assembly phase without any limitations. At this moment we are ready to make readout system for complete EMC if we would have enough hardware.
    • EMC digitizer
      • Pawel has reported the status of hardware. The firmware: Firmware is completely ported on a Kintex-7 version of the board. We have functional board which we received in February (the board has some hardware bugs). We received the bug-fixed version from Pawel and will test it this week.
      • We would like to introduce MWD filtering to the pulse-processing algorithm since with the current filter resulting pulse is too long for the endcap.
    • DAQ
      • The statements "Hardware for DAQ on hold, waiting for next FPGA generation. Delays software developments and tests" are wrong.
      • There is discussion on a newer generation of CN in order to use advantages of modern FPGAs. The discussion is very healthy, there is synergy between CN and EMC DC developments.
      • The current generation of CN can be used to make demonstrator of the PANDA DAQ. Funding is required for this (expected "pre-assembly" funding is on-hold).
      • All required software/firmware can and should be developed for the existing CN. There is planned test of a complete readout chain with PROTO60.

  • Tom: Two new VPTT preamps tested
    • 0.5 pF version -> rel. gain 2.16
    • 0.4 pF version -> rel. gain 2.61 is too high, not needed.
  • Werner: Only modification by 0.1 pF possible (5% capacitors) or use e.g. 0.56 pF (10% tolerance)
  • Decision: try gain with 0.6 pF, 0.7 pF 0.56 pF? Tobias H. will mail Werner details.
  • Werner: 4 month delivery time for capacitors. Decision: order various capacitors to have them available for production.
  • Tom: new APD preamp unstable below -20 degree.
  • Werner: will produce one version with a little higher gain and another with different parts.

  • Tobias H.: Replacement for defect VPTT received from Hamamatsu.

-- FritzHerbertHeinsius - 14 Apr 2015
Topic revision: r2 - 2015-04-14,
Copyright © by the contributing authors. All material on this collaboration platform is the property of the contributing authors.
Ideas, requests, problems regarding Panda Wiki Send feedback | Imprint | Privacy Policy (in German)