Difference: Hardware (1 vs. 4)

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06 Jun 2014 - Main.MilanWagner
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Data Concentrator

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TRB

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ComputeNode

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<		 Responsible: WolfgangKuehn, ZhenAnLIU
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>		 An FPGA-based computational node for PANDA, BESIII and HADES. For information about old and deprecated versions of the Compute Node, please refer to this page.

Compute Node Version 3 (CNv3):

Motherboard

 
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>		 The so called Compute Node (CN) is foreseen as the FPGA-based hardware component of the PANDA DAQ. The third revision of the CN is an ATCA (Advanced Telecommunications Computing Architecture) based carrier board. It is able to hold up to 4 xFP boards. The CN is equipped with a Xilinx Virtex 4 FX60 as a switching FPGA to connect the xFP boards in an intelligent way to the backplane. It also supplies direct high speed communications between these boards via Rocked IO.
cn.png

Daughterboard (xFP)

An xFP board is an Extended Telecommunications Computing Architecture (xTCA) compliant board. It is an FPGA based μTCA compliant board featuring a Xilinx Virtex 5 FX70T -2 FPGA, 4 GB DDR2 RAM, 1Gb Ethernet, and 4 SFP+ (Small Form Factor Pluggable) cages. These cages can be equipped for example with optical or RJ45 interfaces.

xtca.png
 

ComputeNodeLayout

ZhenAnLIU

-- MilanWagner - 05 Jun 2014
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META FILEATTACHMENT attachment="cn.png" attr="" comment="" date="1402055522" name="cn.png" path="cn.png" size="8091920" user="MilanWagner" version="1"
META FILEATTACHMENT attachment="xtca.png" attr="" comment="" date="1402055608" name="xtca.png" path="xtca.png" size="7757374" user="MilanWagner" version="1"
Revision 3
05 Jun 2014 - Main.MilanWagner
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Data Concentrator

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ComputeNode

Responsible: WolfgangKuehn, ZhenAnLIU
Revision 2
05 Jun 2014 - Main.MilanWagner
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META TOPICPARENT name="WebHome"
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ComputeNode

Responsible: WolfgangKuehn, ZhenAnLIU
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