Difference: ComputeNode (1 vs. 10)

Revision 10
18 Jun 2018 - Main.ThomasGessler
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Daughterboard (xFP)

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An xFP board is an Extended Telecommunications Computing Architecture (xTCA) compliant board. It is an FPGA based μTCA compliant board featuring a Xilinx Virtex 5 FX70T -2 FPGA, 4 GB DDR2 RAM, 1Gb Ethernet, and 4 SFP+ (Small Form Factor Pluggable) cages. These cages can be equipped for example with optical or RJ45 interfaces.

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An xFP board is an Extended Telecommunications Computing Architecture (xTCA) compliant board. It is an FPGA based μTCA compliant board featuring a Xilinx Virtex 5 FX70T -2 FPGA, 4 GB DDR2 RAM, 1Gb Ethernet, and 4 SFP+ (Small Form Factor Pluggable) cages. These cages can be equipped for example with optical or RJ45 interfaces.

Compute Node Version 4 (CNv4)

Carrier Board

High-resolution photographs of the first CNCB4 prototypes can be found attached to this topic.
 
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Revision 9
18 Jun 2018 - Main.ThomasGessler
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Daughterboard (xFP)

An xFP board is an Extended Telecommunications Computing Architecture (xTCA) compliant board. It is an FPGA based μTCA compliant board featuring a Xilinx Virtex 5 FX70T -2 FPGA, 4 GB DDR2 RAM, 1Gb Ethernet, and 4 SFP+ (Small Form Factor Pluggable) cages. These cages can be equipped for example with optical or RJ45 interfaces.

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META FILEATTACHMENT attachment="cncb4_bottom.jpg" attr="" comment="Bottom view of Compute Node Carrier Board v4" date="1529313854" name="cncb4_bottom.jpg" path="cncb4_bottom.jpg" size="7939903" user="ThomasGessler" version="1"
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Revision 8
05 Jun 2014 - Main.SoerenFleischer
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Compute Node Version 3 (CNv3):

Motherboard

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The so called Compute Node(CN) is foreseen as the FPGA based hardware component of the PANDA DAQ. The third revision of the CN is an ATCA (advanced Telecommunication Computing Architecture) based carrier board. It is able to carry up to 4 xFP boards. The CN is equipped with a Xilinx Virtex 4 FX60, as a switching FPGA to connect the xFP boards in an intelligent way to the backplane. It supplies also direct high speed communications between these boards via rocked I/O.

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The so called Compute Node (CN) is foreseen as the FPGA-based hardware component of the PANDA DAQ. The third revision of the CN is an ATCA (Advanced Telecommunications Computing Architecture) based carrier board. It is able to hold up to 4 xFP boards. The CN is equipped with a Xilinx Virtex 4 FX60 as a switching FPGA to connect the xFP boards in an intelligent way to the backplane. It also supplies direct high speed communications between these boards via Rocked IO.

 

Daughterboard (xFP)

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A xFP board is an extended Telecommunications Computing Architecture (xTCA) compliant board. It is a FPGA based board with a μTCA form factor, featuring a Xilinx Virtex 5 FX70T -2 FPGA, 4 GB DDR2, 1Gb Ethernet, and 4 SFP+ (Small Form- Factor Pluggable) cages. These cages can be equipped for example with optical or RJ45 interfaces.


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An xFP board is an Extended Telecommunications Computing Architecture (xTCA) compliant board. It is an FPGA based μTCA compliant board featuring a Xilinx Virtex 5 FX70T -2 FPGA, 4 GB DDR2 RAM, 1Gb Ethernet, and 4 SFP+ (Small Form Factor Pluggable) cages. These cages can be equipped for example with optical or RJ45 interfaces.

Revision 7
05 Jun 2014 - Main.MilanWagner
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Compute Node Version 3 (CNv3):

Motherboard

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The so called Compute Node(CN) is foreseen as the FPGA based hardware component of the PANDA DAQ. The third revision of the CN is an ATCA (advanced Telecommunication Computing Architecture) based carrier board. It is able to carry up to 4 xFP boards. The CN is equipped with a Xilinx Virtex 4 FX60, as a switching FPGA to connect the xFP boards in an intelligent way to the backplane. It supplies also direct high speed communications between these boards via rocked I/O.

 

Daughterboard (xFP)

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A xFP board is an extended Telecommunications Computing Architecture (xTCA) compliant board. It is a FPGA based board with a μTCA form factor, featuring a Xilinx Virtex 5 FX70T -2 FPGA, 4 GB DDR2, 1Gb Ethernet, and 4 SFP+ (Small Form- Factor Pluggable) cages. These cages can be equipped for example with optical or RJ45 interfaces.


Revision 6
05 Jun 2014 - Main.SoerenFleischer
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Compute Node Overview

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An FPGA-based computational node for Panda, BESIII and HADES.
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An FPGA-based computational node for PANDA, BESIII and HADES.
 
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Schematics:

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For information about old and deprecated versions of the Compute Node, please refer to this page.

Compute Node Version 3 (CNv3):

Motherboard

 
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A first version of the chematics has been released. Feel free to review it.
  • HPCN.rar: Compute Node Schematics ver1. (Protel-Altium 2006)

This is a shortlist of the bugs for the compute node at this moment:
1. The clock for CPLD should be 100MHz (Schematic is correct, only need to change the component on the board).
2. There should be dedicated reference clocks for MGTs in different columns.
3. Configuration for PHYs (Please refer to Xilinx ML405).
4. Clocks for the PHYs (We're trying crystals with 2.5v power supply, if this doesn't work then on the new board we have to change to 3.3V)

Compute Node Version 3:


People Involved

TiagoPerez
WolfgangKuehn
MingLiu
ShuoYang
ZhenAnLiu
IgorKonorov
AlexanderMann
and others.

-- TiagoPerez - 14 Mar 2007

META FILEATTACHMENT attr="" comment="Compute Node Schematics ver1. (Protel-Altium 2006)" date="1177074732" name="HPCN.rar" path="HPCN.rar" size="1714315" user="TiagoPerez" version="1.1"
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Daughterboard (xFP)

Revision 5
03 Jun 2014 - Main.MilanWagner
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2. There should be dedicated reference clocks for MGTs in different columns.
3. Configuration for PHYs (Please refer to Xilinx ML405).
4. Clocks for the PHYs (We're trying crystals with 2.5v power supply, if this doesn't work then on the new board we have to change to 3.3V)
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Compute Node Version 3:

 

People Involved

Revision 4
09 Jun 2008 - Main.ShuoYang
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  A first version of the chematics has been released. Feel free to review it.
  • HPCN.rar: Compute Node Schematics ver1. (Protel-Altium 2006)
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This is a shortlist of the bugs for the compute node at this moment:
1. The clock for CPLD should be 100MHz (Schematic is correct, only need to change the component on the board).
2. There should be dedicated reference clocks for MGTs in different columns.
3. Configuration for PHYs (Please refer to Xilinx ML405).
4. Clocks for the PHYs (We're trying crystals with 2.5v power supply, if this doesn't work then on the new board we have to change to 3.3V)
 

People Involved

TiagoPerez
WolfgangKuehn
Revision 3
05 Feb 2008 - Main.ShuoYang
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People Involved

TiagoPerez
WolfgangKuehn
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MingLiu
ZhenAnLiu
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MingLiu
ShuoYang
ZhenAnLiu
  IgorKonorov
AlexanderMann
and others.
Revision 2
20 Apr 2007 - Main.TiagoPerez
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META TOPICPARENT name="WebHome"

Compute Node Overview

An FPGA-based computational node for Panda, BESIII and HADES.
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Schematics:

A first version of the chematics has been released. Feel free to review it.
  • HPCN.rar: Compute Node Schematics ver1. (Protel-Altium 2006)
 

People Involved

TiagoPerez
WolfgangKuehn
Line: 16 to 20
 

-- TiagoPerez - 14 Mar 2007
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META FILEATTACHMENT attr="" comment="Compute Node Schematics ver1. (Protel-Altium 2006)" date="1177074732" name="HPCN.rar" path="HPCN.rar" size="1714315" user="TiagoPerez" version="1.1"
 
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